We are seeking a talented Design and Verification Engineer to join our dynamic team. In this role, you will be responsible for defining and implementing verification plans for IP/SoC designs, developing test benches, and executing verification tasks to ensure the functionality and quality of our products.
Key Responsibilities
- Define and implement IP/SoC verification plans to meet project requirements.
- Develop verification test benches and infrastructure for IP/sub-system/SoC level verification.
- Create and execute functional tests based on the verification test plan.
- Drive Design Verification closure using defined verification metrics including test plan completeness, functional coverage, and code coverage.
- Investigate, debug, root-cause, and resolve functional failures in collaboration with the Design team.
- Contribute to improving verification methodologies, flows, and tools to enhance overall verification efficiency and quality.
Requirements
- Bachelor's or Master's degree in Computer Science, Electronics Engineering, or equivalent practical experience.
- 4+ years of experience in ASIC/FPGA design verification.
- Strong understanding of verification methodologies and tools (e.g., UVM, SystemVerilog).
- Proficiency in scripting languages such as Python, Perl, or TCL for automation.
- Experience with industry-standard EDA tools and simulators.
- Excellent analytical and problem-solving skills.
- Ability to work effectively both independently and as part of a team.
- Strong communication and interpersonal skills.
Additional Information
- Competitive salary and benefits package.
- Opportunity to work on cutting-edge technologies and projects.
- Dynamic and collaborative work environment with growth opportunities.
How to Apply.Interested candidates should submit a resume highlighting relevant experience and qualifications to [email/contact information].